We are planning to use CT2G3S1339M.M8FKD with a FPGA board. For generating the memory controller for the SODIMM module, the following details are required.
tcke, tfaw, tras, trcd, trefi, trfc, trp, trrd, trtp, twtr
Row address bits, Column address bits, Bank address bits
I think the datasheet should cover these parameters, but in the datasheet I got these values are not there.
Can I have a detailed datasheet for the same?
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