I'm working on a Xilinx FPGA based project where we just upgraded the ram to Crucial's CT12864AC667. Unknown at the time of purchase the system wasn't as Plug-And-Play as we thought. Instead we need to create a memory controller with the specific latencies for the ram in use.
Does crucial offer publicly any further documentation on values such as:
This is the type of question I would recommend that you contact our Customer Support for. Depending on which build of CT12864AC667 you ahve, they may be able to provide you with a data sheet. Make sure you use the right link for your region.